Reseachers Databook

Faculty of Engineering, Graduate School of Engineering, IWATE UNIVERSITY

HIRAYAMA TakashiLecturer

Affiliation Faculty of Engineering
Department of Electrical Engineering and Computer Science

Graduate School of Engineering
·Master's Programs
Electrical Engineering and Computer Science
·Doctoral Programs
Electrical Engineering and Computer Science
Keywords High-Level and Logic Synthesis, Logic Optimization Algorithms, Testing for VLSIs
Summary Digital circuits used to be designed manually by engineers, but they are now synthesized automatically by computers. Therefore, the performance of the automatic synthesis software significantly affects the quality of the resulting circuits. To design modern vary-large-scale digital circuits efficiently, novel synthesis software, or algorithm, is required. To cope with the need, I am engaged in developing synthesis algorithms exploiting exclusive-OR (EXOR) gates. By combining the properties of EXOR operation and the branch-and-bound strategy, I have successfully developed the world's first algorithm that can synthesize exact minimum AND-EXOR circuits for some practical functions.
Research Fields Computer Science
Subjects Logic Circuits I, Logic Circuits II
[Master's Programs] Advanced Computer Science II
[Doctoral Programs] Advanced Logic Synthesis and Verification
undefined HIRAYAMA Takashi
image of lab.